ENCLUSTRA FPGA Code Migration

Our existing design was written for an older ENCLUSTRA module that is now out of production; a newer ENCLUSTRA board has already been chosen and I need the current HDL project moved over so it runs flawlessly on this hardware. The focus is strict functional compatibility: the migrated bitstream must interface with the same peripherals, respect the same I/O timing, and deliver identical behaviour to the legacy product. The codebase (mixed VHDL/Verilog with some Xilinx IP cores, other) already builds under Vivado, and I can provide constraint files, limited board documentation, and schematics for the new module. You will analyse the differences, update pin-outs, clocks, memory interfaces, and any IP parameters affected by the hardware change, then verify the design through simulation and an on-board test build. Deliverables • Updated project repository compiling for the new ENCLUSTRA FPGA • Revised constraint files and any modified HDL or IP configuration • A brief migration report describing what changed, why, and how to reproduce the build When you send your proposal, please outline your migration plan, tool versions you intend to use, estimated milestones, and any prior work that proves you have handled similar board changes.